1. Field of the Invention
The present invention relates to a memory system.
2. Description of the Related Art
FIG. 7 is a block diagram showing the structure of a prior memory card and its explanation will be given below.
A memory card 701 is composed of a control section 702 and a semiconductor storage device section 703. An input/output line 708 is a line for inputting/outputting a control signal and data. The control section 702 includes a command control unit 705, an address control unit 706, a buffer control unit 707, and a data buffer 704. The command control unit 705 can select and execute processing in accordance with a command inputted from the outside. The address control unit 706 can set an address included in the command, which is transferred from the command control unit 705, in the semiconductor storage device section 703. The data buffer 704 temporarily stores input/output data. The buffer control unit 707 can control the data buffer 704. The control section 702 can control other functions than the address setting of the semiconductor storage device section 703.
A host of the outside can control the memory card 701. When the host desires to access a physical address n of the semiconductor storage device section 703, it inputs the physical address n together with a predetermined command into the input/output line 708 of the memory card 701. In the control section 702, an address is set by the command control unit 705 and address control unit 706 so that the semiconductor storage device section 703 becomes accessible.
In a prior memory card having a nonvolatile semiconductor storage device typified by a NAND-type flash memory installed therein, a defect area exists as in a hard disc drive or the like, and management of an address and logical address/physical address conversion processing of the defect area are performed. An example of the address management will be explained with reference to FIG. 5 and FIG. 6.
FIG. 5 shows the layer structure of the address management of the prior memory card. An operating system 502 can access a memory card 505 as required in accordance with a code of an application 501. In this case, the operating system 502 transfers a name of a file desired to be accessed, directory information, and the like to a file management processing section 503. In accordance with the transferred data, the file management processing section 503 transfers information on a logical address to be accessed to a logical address/physical address conversion processing section 504. The logical address/physical address conversion processing section 504 retrieves the designated logical address from the memory card 505 and converts it to a corresponding physical address so as to access the memory card 505.
FIG. 6 shows an example of file management of the prior memory card. The memory card stores a logical address 602 and availability information 603 by each physical block address 601. Specifically, the logical address 602 and availability information 603 are stored in a specific area of each block. An explanation 604 is an explanation about each block.
An example of data format of the memory card will be explained. The memory card is erasable by each block unit and, to simplify the explanation, the total number of the blocks is supposed as 20. The memory is supposed to have a defect in a block of a physical address xe2x80x9c5xe2x80x9d. Further, FIG. 6 shows a state in which the correspondence between the physical addresses and logical addresses has become unsystematic as a result of repeated data rewrite and the like. It is supposed that the memory card has physical format structure information in the head address xe2x80x9c0xe2x80x9d of the physical addresses 601 and logical format structure information in the head address xe2x80x9c0xe2x80x9d of the logical addresses 602, that is, a physical address xe2x80x9c2xe2x80x9d in FIG. 6, in accordance with the physical format structure information. It should be noted that the physical address is an address on the semiconductor storage device and the logical address is a virtual address set by the file management processing section 503 (FIG. 5).
In general, for each file recorded in the memory card, there exists data showing the logical address of a destination where data of the file is held. For example, in an MS-DOS compatible format, the data is called FAT (File Allocation Table) and, in the example in FIG. 6, the FAT information exists in a logical address xe2x80x9c1xe2x80x9d.
At this time, the logical address of the file is operated by the file management processing section 503. The physical address is operated by the logical address/physical address conversion processing section 504 and, for example, as shown by a file A which occupies three blocks, stored physical addresses are not systematic and may possibly be allocated anywhere across the whole data areas.
Plural applications are stored in one memory card in some cases. The host can select and access the applications in the memory card. In such a case, it is sometimes desired to protect data made by one application while other applications are being accessed. In this case, as a method for securely protecting it, there can be considered a method in which a memory space of the memory card is divided so that applications use separated memory spaces respectively.
However, in the prior memory card, it is difficult to divide the memory space and therefore it is impossible to manage security by this method.
It is an object of the present invention to divide a memory space to facilitate security management.
According to one aspect of the present invention, provided is a memory system comprising a semiconductor storage device divided into plural areas, in which information becomes accessible by specifying an absolute physical address, and a control section for controlling the semiconductor storage device. The control section receives a designating signal for designating one area out of the plural areas of the semiconductor storage device and a relative physical address independent by each area, and specifies the absolute physical address by adding an offset address corresponding to the area designated by the designating signal to the relative physical address, so that the semiconductor storage device is accessed.
Since the semiconductor storage device is divided into the plural areas and the control section receives the relative physical address independent by each area, a user can handle the respective areas as if they were memories separated from each other. By the area designation, only the designated area becomes accessible so that the security management can be easily and securely performed.